IC chips, such as, STT-MRAM chips, are typically encapsulated in protective packages to prevent interference or change of spin in a magnetic tunnel junction (MTJ) from stray or externally applied electromagnetic fields and to prevent damage during subsequent processing. STT-MRAM structures need to be shielded from all sides with a shielding structure for better protection, however, known shielding approaches, e.g., in a wire-bond packaging, result in lower magnetic immunity because the shielding structure is not formed in a closed loop, which is especially true for perpendicular STT-MRAM structures. Further, wider openings in the shielding structures results in lower magnetic shielding performance, e.g., inferior threshold for magnetic shielding.
Referring to FIG. 1, a cross-sectional view of a magnetic shielding in a wire-bond MRAM package, magnetic epoxy layers 101 and 103 are formed over and below a portion of the MRAM structure 105, and a protective shield layer 107 is formed over and under the epoxy layers 101 and 103, respectively. However, this design is problematic, as described above, because the protective shield layer 107 has a wide opening 109 that exposes the MRAM die 105 to interference from externally applied electromagnetic fields. Further, the wire-bond package is incapable of high density input/output (I/O) required in system on chip (SOCs).
A need therefore exists for methodology enabling magnetically shielding of a perpendicular STT-MRAM structure from all six sides in flip-chip package.